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CyberWorkBench®
High Level Synthesis from C/C++/SystemC to ASIC/FPGA
***CyberWorkBench® is C-based High Level Synthesis and Verification tool suite both for ASIC and FPGA.***
Overview
All the tools work together in our integrated design environment, for easy synthesis, analysis and verification.
C-based Design Service
We also offer design house services to convert behavioral C descriptions into optimized synthesizable RTL code (Verilog or VHLD) for FPGAs or ASICs.
The advantages of our C-based design house services compared to traditional RTL based services are:
•Lower cost.
•Shorted design cycle due to the increase in design productivity of using C as an input language.
•Generation of higher performance and/or smaller circuits compared to RTL designs because
we use NEC’s proprietary High-Level Synthesis tool CyberWorkBench®.
Some examples of successful projects include image compression algorithms (JPEG 2000 at 120 fps), image sharpening (e.g. denoising, HDR), encryption systems, communication circuits, CODECs, etc…
Contact us for further information.
CyberWorkBench Brochure