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NEC 1U Rack Server Provides High-Speed Processing of Big Data through Super-Parallel Technologies- As much as 15 times the processing performance of existing models -

*** For immediate use November 13, 2012

Tokyo, November 13, 2012 - NEC Corporation (NEC; TSE: 6701) is providing a new addition to the Express5800 IA server series, the "Express5800/HR120a-1." Sales of the server have begun in Japan and availability is expected to steadily expand to markets throughout the world.

The Express5800/HR120a-1 features the latest Intel(R) architecture, including the Intel Xeon(R) Phi(TM) family, supporting Many Integrated Core (MIC) and super-parallel processing that existing servers struggle to perform.  Furthermore, the server is equipped with NEC's I/O symmetric architecture, enabling up to 15 times the processing performance of existing machines.

"This new product provides high-speed, real-time processing at a low cost during a time that big data is drawing greater attention as a key for handling the needs of complex systems such as image analysis for security systems, inspection systems for production lines and processing for a wide range of unstructured data," said Kazuaki Iwamoto, general manager, Server Division, NEC.

Key features of the Express5800/HR120a-1 include:

  1. Concurrent parallel processing capability as high as 520 threads
    Supports up to two Intel Xeon E5-2600 family products. The system also supports Intel MIC architecture and a core that achieves 4 threads while accommodating more than 50 units of the Intel Xeon Phi coprocessor on as many as 2 PCI boards. As a result, one server is capable of executing as many as 520 threads of parallel processing at the same time.

  2. Xeon Phi and NEC architecture enable 15 times the performance of existing machines
    The Intel Xeon Phi significantly reduces time delay in processing when compared to existing machines by transmitting data directly, without passing through the main storage of PCI board accelerators. The adoption of NEC's symmetric architecture also accelerates access to data by expanding the I/O data transmission bandwidth for each coprocessor. This enables 15 times the processing performance of existing machines.

  3. Reduces total cost of operations
    Reduces the total cost of operations by as much as 80% by improving the performance of each unit, which significantly reduces the number of servers required for an entire system. Furthermore, application development costs can be minimized since there is no need to prepare or learn a new development environment during parallelization. This is possible because the Express5800/HR120a-1 supports an application development environment using x86 architecture.


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NEC Press Contacts (Japan)

Seiichiro Toda
NEC Corporation

Joseph Jasper
NEC Corporation