NEC Events in SC20

Aurora Forum Webinar

In this year's Aurora Forum we will show you the latest developments of the SX-Aurora TSUBASA Vector Engine. In addition to that our invited users will share their experiences on enhancing their research and daily work by using the vector architecture.

On-demand video now available

Nov 17, 2020 11:00 - 14:00 EST / Nov 17, 2020 17:00 - 20:00 CET

11:00-11:30 EST / 17:00-17:30 CET
NEC Vector Engine Performance with Legacy CFD Codes
Presenter: Mr. Keith Obenschain, U.S. Naval Research Laboratory
Abstract

Many codes that were developed during the vector supercomputing era from the 1970's to 1990's are still in use with vector friendly constructs in their codebase. The recently released NEC Vector Engine provides an opportunity to exploit this vector heritage. The NEC Vector engine can potentially provide state of the art performance without a complete rewrite of the codebase. Given the time and cost required to port or rewrite codes, this is potentially an attractive solution. This presentation will assess how the NEC Vector engine performance compares with existing architectures using traditional benchmarks, a legacy CFD program FDL3DI and the effort required to take full advantage of the architecture.

11:45-12:15 EST / 17:45-18:15 CET
Performance Evaluation using the TAU Performance System on the NEC VE platform.
Presenter: Professor Sameer Shende, University of Oregon

Abstract

To meet the needs of computational scientists to evaluate and improve the performance of their parallel, scientific applications, we present the TAU Performance System and describe how it supports the NEC SX-TSUBASA Vector Engine (VE) platform. This talk presents TAU as a versatile tool for performance profiling and tracing that supports both direct instrumentation and sampling. With event-based sampling in TAU, it is possible to evaluate the performance of un-instrumented applications. TAU can collect data at the fine granularity of statements as well as routines. It supports direct instrumentation of MPI, pthread, and OpenMP runtimes and can be used with sampling. The talk will describe the elements of TAU and show a demonstration of TAU's usage on the NEC VE platform.
Biography
Sameer Shende received his Ph.D. from the University of Oregon in 2001 in Computer and Information Science and his Bachelor of Technology (B.Tech) from the Indian Institute of Technology, Bombay in 1991. He has helped develop the TAU Performance System, a leading performance evaluation toolkit in HPC, the Extreme-scale Scientific Software Stack (E4S), and the Program Database Toolkit (PDT) projects at the University of Oregon. His research interests include performance instrumentation, measurement, analysis, compiler optimizations, runtime systems, and one-sided communication libraries. He serves as a Research Associate Professor and the Director of the Performance Research Laboratory at the University of Oregon and the President of ParaTools, Inc.

12:30-13:00 EST / 18:30-19:00 CET
Operation Start of the Second-Generation SX-Aurora TSUBASA
Presenter: Prof. Hiroyuki Takizawa, Tohoku University
Abstract

Our brand-new supercomputing system has started operation on October 1. The system is named Supercomputer AOBA, which is also the name of our university campus meaning young growing leaves in Japanese language. The total computing power of the system is about 1.8 Pflop/s, and mostly comes from 576 Vector Engines of the second-generation SX-Aurora TSUBASA. This talk will introduce performance evaluation results obtained using some benchmarks and our key applications.

13:15-13:45 EST / 19:15-19:45 CET
Introduction and use cases of SX-Aurora TSUBASA (PCIe card type vector computer)
Presenter: Masashi Ikuta, NEC Corporation
Abstract

SX-Aurora TSUBASA is a PCIe card type vector supercomputer not only for the rich supercomputer centers, but also for everyone who is interested in it. The presentation will start from the introduction of SX-Aurora TSUBASA including its design concept, architecture, and explain how different it is from other computers. This will be followed by some use cases. The use case shall cover large supercomputers like the Earth Simulator, but today we also see many non-traditional HPC users because it is downsized to a PCIe card and became affordable to personal users. Besides, we see possibilities in verticals new to us. One of them is Oil & Gas and I will present why we think our architecture is a good fit for this vertical.
The talk will also cover the roadmap of SX-Aurora TSUBASA and conclude by how we think this is going to contribute to the future of global society.

On-demand video now available

Nov 18, 2020 08:00 - 11:00 EST / 14:00 - 17:00 CET

08:00-08:30 EST / 14:00-14:30 CET
Porting Strategies for SX-Aurora VE
Presenter: Dr. Erich Focht, NEC Deutschland GmbH
Abstract

The SX-Aurora Vector Engine allows for multiple programming models, from native VE porting, various offloading models and hybrid MPI. The presentation discusses various approaches to porting programs to the VE and presents some of the tools that can be used to ease this kind of work.

08:45-09:15 EST / 14:45-15:15 CET
SOL4VE: Running Deep Neural Networks on the NEC SX-Aurora TSUBASA
Presenter: Dr-ing. Nicolas Weber, NEC Laboratories Europe
Abstract

Artificial Intelligence -- especially Deep Neural Networks -- is one of THE hottest topics in research and development today. This makes it a key requirement for hardware vendors to support all widely used AI frameworks. However, the field is quickly evolving, with thousands of scientific papers per year, and AI frameworks maintained by hundreds of developers. This puts a heavy burden on hardware vendors, not only to provide software support for the frameworks once, but to continuously keep up with new features. As there is no common code base shared by these frameworks the vendors need to write code for each framework individually, resulting in varying performance.

SOL is an AI acceleration middleware that seamlessly integrates into AI frameworks. It designed to provide portable performance across all frameworks by decoupling the computations from the framework. By hooking up into the execution runtime of the frameworks, SOL can use code generation and vendor-optimized compute libraries to improve the performance while not limiting the usability of the AI framework.

With SOL it is possible to inject hardware support (i.e. for the NEC SX-Aurora TSUBASA) into AI frameworks, without changing the framework's codebase.

This talk will introduce the SOL project, SOL's current status, future roadmap, the SOL4VE closed beta program and VEDA: a CUDA-like programming API for the NEC SX-Aurora TSUBASA.

09:30-10:00 EST / 15:30-16:00 CET
Performance Comparing of VASP on CLAIX-2018 and SX-Aurora TSUBASA
Presenter: M. Sc. Alesja Dammer, RWTH Aachen University
Abstract

VASP is very important application for user of RWTH Compute Cluster. Now we are working on improving, reliability and productivity of High-Performance Computing on the NEC CLAIX system and as an important code within the user base of CLAIX VASP was chosen for porting, analyzing and optimizing on SX-Aurora TSUBASA. Here we compare the scalability and power efficiency of VASP on SX-Aurora TSUBASA and CLAIX-2018 with a representative user test case and discuss metrics to make performance comparing of the compute systems more fair and aware. We hope with our results to optimize performance of VASP on CLAIX for our users and to increase our awareness of SX-Aurora TSUBASA.

10:15-10:45 EST / 16:15-16:45 CET
LLVM for SX-Aurora TSUBASA
Presenter: Simon Moll, NEC Deutschland GmbH
Abstract

The LLVM compiler for SX-Aurora is the emerging, open-source alternative to the official NEC compilers. Apart from being an open ecosystem, LLVM for SX-Aurora offers unique features over the official compiler lineup. We present the
current development status, opportunities and give an outlook on the development roadmap.

Exhibitor Forum
Nov 17, 2020 10:30 - 11:00 EST / 16:30 - 17:00 CET

10:30-11:00 EST / 16:30-17:00 CET
Introduction and use cases of SX-Aurora TSUBASA (PCIe card type vector computer)
Presenter: Masashi Ikuta, NEC Corporation
[Recorded Video & Q&A]
Abstract
SX-Aurora TSUBASA is a PCIe card type vector supercomputer not only for the rich supercomputer centers, but also for everyone who is interested in it. The presentation will start from the introduction of SX-Aurora TSUBASA including its design concept, architecture, and explain how different it is from other computers. This will be followed by some use cases. The use case shall cover large supercomputers like the Earth Simulator, but today we also see many non-traditional HPC users because it is downsized to a PCIe card and became affordable to personal users. Besides, we see possibilities in verticals new to us. One of them is Oil & Gas and I will present why we think our architecture is a good fit for this vertical.
The talk will also cover the roadmap of SX-Aurora TSUBASA and conclude by how we think this is going to contribute to the future of global society.

Workshop
Nov 19, 2020 11:30 - 13:30 EST / 17:30 - 19:30 CET

11:30-13:30 EST / 17:30-19:30 CET
NEC SX-Aurora TSUBASA or Vector Engine on AI/ML with Python Workshop
Presenter: Gursimranjit Singh, Senior Systems Engineer and Deepak Pathania, Senior Technical Leader
[Live & Q&A]
Abstract
This remote workshop will highlight statistical machine learning based middleware (which is based on Spark and Scikit learn or Python) and also Numpy based API interface/libraries. Achieving very high performance against CPU/GPU because they are running on most advanced and pure Vector Technology. Participants can experience pure vector technology based application codes or other samples. Instructor can provide easy coding related and other advices as well. The pure vector accelerated applications covered will be security related, demand prediction, click prediction, recommendation, clustering problems etc. The target applications will showcase quick acceleration better than the competition, due to the high bytes per flops performance of the pure vector technology.