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Aurora Forum

Next Generation Vector Supercomputer

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NEC again open up the doors to a new Aurora Forum meeting to inform interested developers and users about the SX-Aurora TSUBASA at the ISC HPC Conference in Frankfurt.

The NEC SX-Aurora TSUBASA is the newest in the line of NEC SX Vector Processors with the worlds highest memory bandwidth. The Processor that is implemented in a PCI-e formfactor can be configured
in many flexible configurations together with a standard x86 cluster. No special framework is needed to build the applications, but standard programming paradigms in C/C++ and Fortran, for which the NEC compiler will automatically carry out vectorization and parallelization.

The target is a higher sustained performance with minimum effort by utilizing the Vector Engine hardware.

Event Details

  • DateJune 25, 2018 (Monday) 10:00 ~ 12:00. (Registration from 9:45)
  • Location


    Friedrich-Ebert-Anlage 40
    60325 Frankfurt am Main

    Tel.: +49 (0)69 / 75 40 – 2947
    Fax: +49 (0)69 / 75 40 – 2925

  • HostNEC Corporation

Click here for registration

At this event NEC will present experiences and information about the NEC SX-Aurora TSUBASA.

Aurora Forum Agenda

9:45-10:00 Registration
10:00-10:05 Welcome

SX-Aurora TSUBASA Introduction



Early Experiences with SX-Aurora TSUBASA

(Tohoku University: Prof. Hiroaki Kobayashi)


Machine Learning Middleware for SX-Aurora TSUBASA

(NEC Corporation: Dr. Takeo Hosomi)

10:50-10:55 Break

VEO: Vector Engine Offloading

(NEC Deutschland GmbH: Dr. Erich Focht)


OpenMP Offload Programming Model for Aurora

(RWTH Aachen University: Dr. Tim Cramer)


Deep Learning with Vector Processor

(NEC Laboratories America: Dr. Hans Peter Graf)

11:55-12:00 Closing
  • *The Agenda are subject to change without prior notice.

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