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Video Tutorials

Commentary

This video of contributors, is Design Automation and Reconfigurable Computing Laboratory of the Hong Kong Polytechnic University.

High-Level Synthesis Design Space Exploration (DSE)

Video showing what HLS Design Space Exploration is. The video also shows the difference between

DSE when an ASIC or a FPGA is targeted.

adder 4bit schematic

Hierarchical 4-bit adder using Xilinx ISE schematic entry

SystemC Part 5 Verification

Verification of synthesized SystemC program using cycle accurate models and RTL simulations

Xilinx ISE 1-bit full adder

Tutorial about how to describe, synthesize and simulate a 1-bit full adder using Xilinx ISE 14.6

SystemC part4 Logic Synthesis

Logic synthesis using Xilinx ISE of the Verilog generated by the HLS tool from the FIR SystemC

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