Synthesis Technology for flexible hardware

Application specific hardware engines are widely used to process large amount of data with high-throughput and low-latency, especially in the area of embedded systems e.g. mobile communication devices, radio network equipments and network nodes. However, designing these types of hardware engines requires highly-skilled hardware engineers and a relatively long design cycle. Moreover, current methodologies lack the flexibility to adapt to frequent functional requirement changes.
In order to overcome these drawbacks, we are developing a synthesis methodology for flexible hardware platforms, which compiles C-language descriptions commonly targeted for software applications onto field programmable gate arrays (FPGAs).
One of the applications developed for this flexible hardware is an accelerator for financial trading. In recent years, the expansion of financial markets has resulted in a growing demand from the financial sector for real time analysis of stock information. Flexibility is also required to reflect regulation changes. Our technology compiles financial applications such as filters and analysis directly into the dedicated hardware. It works together with software running on servers and results in speed-ups of approximately 50 times faster than conventional software-only solutions.
Other research topics also include a hardware-software co-design environment to develop optimized embedded systems. We will continue contributing to the ICT society by focusing our research and development in design methodologies for embedded systems.
(References)

August 25, 2011. NEC Releases High Level Synthesis IDE, CyberWorkBench World's 1st Dedicated FPGA Version
September 28, 2011. NEC Develops Hardware Design Technology Providing Real Time Analysis of Stock Information

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