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The demand for high-performance computing of complex, large-scale information and network systems keeps increasing relentlessly. Until recently the high-performance computing needs could be covered by scaling the semiconductor technology , but the large power consumption of these systems has put a hold on the scaling methodology.
In order to overcome current and future limitations we are investigating and developing high performance-low power hardware and software acceleration technologies. To attain these goals, one active research area focuses in parallelizing software for manycore processors, as future processors will continuously embed more and more processor cores, leading to manycores systems. The key in these systems relies in how to parallelize given jobs for hundreds of cores.
Another key element to reduce system level cost and power consumption is the inclusion of special purpose engines (accelerators) in addition to the general-purpose processors.
For example, parallel software techniques developed for GPU have accomplished H.264 real-time HD codec. Also, low power and parallel hardware techniques for digital signal processing developed at our department have achieved the world‘s first 100Gbps digital coherent optical transmission LSI.
We will continue contributing to the ICT society by focusing our research and development in hardware and software acceleration technologies.
