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ESD and PI Options

You can add ESD Rule Check and Power Integrity Analysis (PIStream) as option of EMIStream.

ESD Rule Check

ESD

A discharge can occur when an electrically charged object including a human body touches an electronic device. This phenomenon called ESD (Electrostatic discharge) causes malfunction and failures of electronic devices.

 

EMIStream ESD Rule Check Feature will detect areas where ESD tolerance levels are low on a PCB and offer suggestions for solutions.

  • Check rules and threshold values are based on real world cases from companies around the globe and verified through research at NEC lab
  • Detect possible ESD problems at an early design stage decreasing time spent on evaluation process
  • Import CAD layout data, simple set up, and you are ready to run ESD Rule Check
  • Instantaneously points out ESD causing factors and enables you to take immediate actions to solve the problems

10 Rule Check Items

ESD Rule Check Feature includes Signal Trace, Component Placement Validity, and FG Pattern Check Groups consisting of total 10 key check rules.

 

 

Signal Trace Check Group

  • Traces Near Plane Edge
  • Traces crossing over power and ground plane
  • Signal trace over the slit of the ground/power plane (*1)
  • SG Trace
  • SG Via Spacing
  • Power Protection

 

Signal Trace

  • (*1) Signal trace over the slit of the ground/power plane

    If signal trace is crossing over the slit of the ground/power plane, it will cause ESD noise on signals. This check will detect such structural problems and displays a warning message.

Component Placement Validity Check Group

  • Input Pin Protection
  • Power Pin Protection
  • Reset Line Protection (*2)

 

 

Component Placement Varidity Check

  • (*2) Reset Line Protection
Even though noise suppression components (such as capacitors) are added on ESD sensitive signal trace or power source, they can not reduce the ESD noise effectively if the components are not placed properly. This check points out if the location of the component is not ideal. and shows a warning message.

FG Pattern Check Group

FG Pattern

  • FG Pattern
The ESD noise flows into signal traces and power/ground planes if FG pattern have inadequate signal width or inappropriate via positions crossing over the layers.
In addition, the distance between FG pattern and power/ground planes will affect the noise flowing. This check analyzes the FG pattern structure and its distance from power/ground planes, and displays a warning message if there are any problems.

Power Integrity Analysis

Power Integrity Analysis Function will help you analyze location and value of capacitors in order to prevent IC from malfunctioning. By using this function you can optimize capacitors by taking both EMI and PI into account.
It will help you meet target impedance by adding/moving capacitors, changing capacitance values, plane shapes, and power/ground plane distances.

Standalone software; PIStream is available.

PIStream

IC Model Generation GUI

IC model parameter

You can now take capacitance and inductance of the chip and package into account by using the GUI. These values affect mid frequency resonance which is an important aspect for power integrity. By utilizing this function you can get a more accurate result in order to optimize capacitor placement, values, and numbers.

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